The present invention relates generally to semiconductor fabrication and more specifically to fabrication of copper damascene structures.
As integrated circuit (IC) manufacturers move to copper (Cu) metallization for their most advanced products, protection of copper surfaces presents a big challenge for the back-end-of-line (BEOL) manufacturing processes. Copper damage, such as corrosion and oxidation, is often observed on wafers with open copper surfaces in the presence of moisture and/or acidic gasses.
Copper corrosion destroys the copper surface while copper oxidation results in poor adhesion both at Cu/barrier layer and Cu/stop layer systems. Copper oxide also enhances copper hillock during thermal processes.
U.S. Pat. Nos. 5,380,546 and 5,451,551 both to Krishnan et al. describes a multilevel metallization process using polishing.
U.S. Pat. No. 6,251,786 B1 to Zhou et al. describes a dual damascene interconnect with a silicon nitride (Si3N4) film 34 over the recessed dual damascene interconnect.
U.S. Pat. No. 6,258,713 B1 to Yu et al. describes a dual damascene interconnect with a TiN layer over the planarized dual damascene interconnect.
U.S. Pat. No. 6,274,499 B1 to Gupta et al. describes a dual damascene process with a dielectric cap 30.
U.S. Pat. Nos. 6,114,246 to Weling, 6,103,625 to Marcyk et al. and U.S. Pat. No. 6,083,835 to Shue et al. are related patents describing barrier/CMP stop layers over damascene structures.
The article entitled xe2x80x9cFinding the Ultimate Copper Barrier and Seed,xe2x80x9d Peters; Semiconductor International; July 2001; page 23, describes various barrier/liner materials such as WN, TaN, TaN+Co, TiN and TiN+PVD Cu.
Accordingly, it is an object of one or more embodiments of the present invention to provide a copper damascene structure that protects the upper copper surface.
It is another object of one or more embodiments of the present invention to provide a method of forming a copper damascene structure that protects the upper copper surface.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a structure is provided having a patterned dielectric layer formed thereover. The patterned dielectric layer having an opening formed therein. A barrier layer is formed over the patterned dielectric layer, lining the opening. An initial planarized copper structure is formed within the barrier layer lined opening, and is planar with the barrier layer overlying the patterned dielectric layer. The initial planarized copper structure is recessed below the barrier layer overlying the patterned dielectric layer a distance to form a recessed copper structure. Any copper oxide formed upon the recessed copper structure is removed. A conductor film is formed over the recessed, copper oxide-free initial copper structure and the barrier layer. The excess of the conductor film is removed from over the barrier layer, and the excess of the barrier layer overlying the patterned dielectric layer is removed, by a planarization process to form the planarized final copper structure. The planarized final copper structure comprising: the lower, recessed copper oxide-free initial copper structure; and an overlying planarized conductor film, wherein the overlying planarized conductor film isolates the lower, recessed copper oxide-free initial copper structure from the ambient atmosphere.